Journées Nationales de la Recherche en Robotique

Du 14 au 17 octobre, Olivier Simonin a co-présidé avec François Charpillet (Inria Nancy) les JNRR 2019 Journées Nationales de la Recherche en Robotique, qui se sont tenues à Vittel et parrainées par le GDR Robotique. Le 13 octobre était également organisée la Journée des Jeunes Chercheurs en Robotique JJCR, et les 17/18 un tutoriel Apprentissage & Robotique était organisé par Christian Wolf et David Filliat.

L’événement, qui a lieu tous les 2 ans, a eu un fort succès en accueillant 200 participants, qui ont pu suivre 27 exposés scientifiques sur 3 jours.

Site des JNRR 2019 (accès au programme) :

CITI seminar – John Manuel Delgado and Michael Puentes (TInteresaLab de Unidades Tecnológicas de Santander) – 22/11 at 9:00AM

Title: Pedestrian Behavior Modeling and Simulation from Real Time Data Information

Date and Place: 22 / 11 / 2019 09:00 in TD-D

Speaker: John Manuel Delgado and Michael Puentes (TInteresaLab de Unidades Tecnológicas de Santander – UTS, Colombia)

Host: Oscar Carrillo

Accidents of pedestrians sometimes take lives, in Bucaramanga since 2012 pedestrian died by accidents are 179, and 2873 hurt, In a city like Bucaramanga-Colombia, this means each day at least one pedestrian is involved in an accident. Therefore is necessary to know the causes of accidents in the way to decrease the accidents. One of many reasons to know the causes is with system dynamics, simulating the events of the Pedestrian behavior when accidents occur in risen cities. The implementation simulation joint with technology and research looking for saving lives, reducing the accidental rate, and to implementing or suggesting new policies from the government. This project is looking for the implementation of technology in video records and Deep Learning analysis for the service of the citizens, where a simulation model will be revealing the main variables which intervene in the pedestrian’s behavior. As initials results, shows the methodology here implemented, can reach data which was insufficient before thanks to the cameras and software of objects detection, those are the data input for the simulation model, which after to implement a change in a particular spot of Bucaramanga is possible to decrease the accident rate in 80% where pedestrians could be involved.


PhD Defence: “High-level synthesis and arithmetic optimizations”, Yohann Uguen, Chappe Amphitheater, CITI, 13th of November 2019 at 13h30


High-level synthesis and arithmetic optimizations


High-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, due to their relatively young nature, they still lack many arithmetic optimizations. This thesis proposes safe arithmetic optimizations that should always be applied. These optimizations are simple operator specializations, following the C semantic. Other require to a lift the semantic embedded in high-level input program languages, which are inherited from software programming, for an improved accuracy/cost/performance ratio. To demonstrate this claim, the sum-of-product of floating-point numbers is used as a case study. The sum is performed on a fixed-point format, which is tailored to the application, according to the context in which the operator is instantiated.

In some cases, there is not enough information about the input data to tailor the fixed-point accumulator. The fall-back strategy used in this thesis is to generate an accumulator covering the entire floating-point range. This thesis explores different strategies for implementing such a large accumulator, including new ones. The use of a 2’s complement representation instead of a sign+magnitude is demonstrated to save resources and to reduce the accumulation loop delay.

Based on a tapered precision scheme and an exact accumulator, the posit number systems claims to be a candidate to replace the IEEE floating-point format. A throughout analysis of posit operators is performed, using the same level of hardware optimization as state-of-the-art floating-point operators. Their cost remains much higher that their floating-point counterparts in terms of resource usage and performance.

Finally, this thesis presents a compatibility layer for HLS tools that allows one code to be deployed on multiple tools. This library implements a strongly typed custom size integer type along side a set of optimized custom operators.



  • Philippe Coussy, Professeur des Universités, UBS, Lorient, France : Rapporteur
  • Olivier Sentieys, Professeur des Universités, Univ. Rennes, Inria, IRISA, Rennes : Rapporteur
  • Laure Gonnord, Maître de conférence, Université Lyon 1, France : Examinatrice
  • Frédéric Pétrot, Professeur des Universités, TIMA, Grenoble, France : Examinateur
  • Martin Kumm, Professeur des Universités, Université de Fulda, Allemagne : Examinateur
  • Florent de Dinechin, Professeur des Universités, INSA Lyon, France : Directeur de thèse

CITI seminar – Martin Kumm (University of Applied Sciences Fulda, Germany) – 13/11 at 10:30AM

Title: Design of Optimal Multiplierless FIR Filters

Date and Place: 13 / 11 / 2019 10:30 in TD-C

Speaker: Martin Kumm (University of Applied Sciences Fulda, Germany)

Host: Florent de Dinechin

In this talk we present a novel method for the simultaneous design of digital filters adhering to a given frequency specification and its dedicated (hardware) implementation. Our methods are based on an integer linear programming (ILP) problem and aim to minimize the number of adders used to implement a digital filter. In the first part, an overview is given about the structure of finite impulse response (FIR) filters which typically contain many costly multiplications. As these are usually multiplications by a constant, they can be reduced to additions, subtractions and bit-shifts, leading to a multiplierless realization. A brief overview of state-of-the-art methods for optimizing constant multiplications is presented. In the second part, novel extensions are presented that also consider the frequency specification of the digital filter in the optimization. Compared to previous multiplierless FIR approaches, the methods introduced here ensure adder count optimality. We show the effectiveness by solving established design problems: our results either prove existing heuristics to be optimal or improve their adder count.

Martin Kumm is full professor in the faculty of Applied Computer Science at the University of Applied Sciences Fulda in Germany. His research interests are arithmetic circuits and their optimization in the context of reconfigurable systems (FPGAs).