PhD Defence: “Dynamic Heterogeneous Memory Allocation for embedded devices”, Tristan Delizy, Chappe Amphitheater, CITI, 19th of December 2019 at 10h00


Dynamic Heterogeneous Memory Allocation for embedded devices


Reducing energy consumption is a key challenge to the realisation of the Internet of Things. While emerging memory technologies may offer power reduction and high integration density, they come with major drawbacks such as high latency or limited endurance. As a result, system designers tend to juxtapose several memory technologies on the same chip. We aim to provide the embedded application programmer with a transparent software mechanism to leverage this memory heterogeneity. This work studies the interaction between dynamic memory allocation and memory heterogeneity. We provide cycle accurate simulation of embedded platforms with various memory technologies and we show that different dynamic allocation strategies have a major impact on performance. We demonstrates that interesting performance gains can be achieved even for a low fraction of memory using low latency technology, but only with a clever placement strategy between memory banks. We propose an efficient strategy based on application profiling in our simulator.



  • Olivier Sentieys, Professeur des Universités, Université de Rennes – Examinateur
  • Cécile Belleudy, Maitre de Conférence HDR, Université de Nice Sophia Antipolis – Rapporteure
  • Lionel Torres, Professeur des Universités, Université de Montpellier – Rapporteur
  • Guillaume Salagnac, Maitre de Conférences, INSA de Lyon – Examinateur, Encadrant
  • Tanguy Risset, Professeur des Universités, INSA de Lyon – Examinateur, Co-directeur de thèse
  • Matthieu Moy, Maitre de Conférences HDR, Université Claude Bernard Lyon 1 – Examinateur, Co-directeur de thèse